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Searched refs:CLK_TOP_F26M_SEL (Results 1 – 5 of 5) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt7986-clk.h77 #define CLK_TOP_F26M_SEL 54 macro
A Dmediatek,mt7981-clk.h99 #define CLK_TOP_F26M_SEL 86 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt7986-topckgen.c263 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_F26M_SEL, "csw_f26m_sel",
A Dclk-mt7981-topckgen.c319 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_F26M_SEL, "csw_f26m_sel",
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A Dmt7986a.dtsi267 assigned-clock-parents = <&topckgen CLK_TOP_F26M_SEL>;
280 assigned-clock-parents = <&topckgen CLK_TOP_F26M_SEL>;

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