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Searched refs:CLK_TOP_GCPU_SEL (Results 1 – 6 of 6) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8135-clk.h99 #define CLK_TOP_GCPU_SEL 88 macro
A Dmediatek,mt8365-clk.h110 #define CLK_TOP_GCPU_SEL 100 macro
A Dmt2712-clk.h197 #define CLK_TOP_GCPU_SEL 166 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8135.c390 MUX_GATE(CLK_TOP_GCPU_SEL, "gcpu_sel", gcpu_parents, 0x0164, 24, 3, 31),
A Dclk-mt2712.c890 MUX_GATE(CLK_TOP_GCPU_SEL, "gcpu_sel",
A Dclk-mt8365.c525 MUX_GATE_CLR_SET_UPD(CLK_TOP_GCPU_SEL, "gcpu_sel", gcpu_parents, 0x0e0,

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