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Searched refs:CLK_TOP_HD20_HDCP_CCLK (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8195-clk.h91 #define CLK_TOP_HD20_HDCP_CCLK 79 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8195-topckgen.c1052 MUX_GATE_CLR_SET_UPD(CLK_TOP_HD20_HDCP_CCLK, "top_hd20_hdcp_cclk",

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