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Searched refs:CLK_TOP_HDCP_24M_SEL (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8173-clk.h129 #define CLK_TOP_HDCP_24M_SEL 119 macro
A Dmt2712-clk.h167 #define CLK_TOP_HDCP_24M_SEL 136 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8173-topckgen.c601 MUX_GATE(CLK_TOP_HDCP_24M_SEL, "hdcp_24m_sel", hdcp_24m_parents,
A Dclk-mt2712.c822 MUX_GATE(CLK_TOP_HDCP_24M_SEL, "hdcp_24m_sel",

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