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Searched refs:CLK_TOP_IRDA_SEL (Results 1 – 8 of 8) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8135-clk.h76 #define CLK_TOP_IRDA_SEL 65 macro
A Dmediatek,mt6795-clk.h114 #define CLK_TOP_IRDA_SEL 103 macro
A Dmt8173-clk.h117 #define CLK_TOP_IRDA_SEL 107 macro
A Dmt2712-clk.h154 #define CLK_TOP_IRDA_SEL 123 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt6795-topckgen.c491 TOP_MUX_GATE(CLK_TOP_IRDA_SEL, "irda_sel", irda_parents, 0xa0, 8, 2, 15, 0),
A Dclk-mt8173-topckgen.c579 MUX_GATE(CLK_TOP_IRDA_SEL, "irda_sel", irda_parents, 0x00a0, 8, 2, 15),
A Dclk-mt8135.c357 MUX_GATE(CLK_TOP_IRDA_SEL, "irda_sel", irda_parents, 0x0140, 24, 2, 31),
A Dclk-mt2712.c793 MUX_GATE(CLK_TOP_IRDA_SEL, "irda_sel",

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