Searched refs:CLK_TOP_MSDC50_0_HC_SEL (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A D	mediatek,mt8365-clk.h	81 #define CLK_TOP_MSDC50_0_HC_SEL 71 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A D	clk-mt8365.c	441 MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC50_0_HC_SEL, "msdc50_0_hc_sel",

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