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Searched refs:CLK_TOP_MSDCPLL_CK (Results 1 – 9 of 9) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt6797-clk.h101 #define CLK_TOP_MSDCPLL_CK 91 macro
A Dmt6779-clk.h96 #define CLK_TOP_MSDCPLL_CK 86 macro
A Dmt8183-clk.h121 #define CLK_TOP_MSDCPLL_CK 85 macro
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A Dmt8183-evb.dts117 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
A Dmt8183-pumpkin.dts155 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
A Dmt8183-kukui.dtsi362 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt6797.c83 FACTOR(CLK_TOP_MSDCPLL_CK, "msdcpll_ck", "msdcpll", 1, 1),
A Dclk-mt6779.c98 FACTOR(CLK_TOP_MSDCPLL_CK, "msdcpll_ck", "msdcpll", 1, 1),
A Dclk-mt8183.c94 FACTOR(CLK_TOP_MSDCPLL_CK, "msdcpll_ck", "msdcpll", 1, 1),

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