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Searched refs:CLK_TOP_MUX_AXI (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt6797-clk.h13 #define CLK_TOP_MUX_AXI 3 macro
A Dmt8183-clk.h36 #define CLK_TOP_MUX_AXI 0 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt6797.c329 MUX(CLK_TOP_MUX_AXI, "axi_sel", axi_parents,
A Dclk-mt8183.c451 MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MUX_AXI, "axi_sel",

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