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Searched refs:CLK_TOP_MUX_MM (Results 1 – 6 of 6) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt6797-clk.h16 #define CLK_TOP_MUX_MM 6 macro
A Dmt8183-clk.h37 #define CLK_TOP_MUX_MM 1 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt6797.c333 MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
A Dclk-mt8183.c454 MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_MM, "mm_sel",
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A Dmt6797.dtsi214 <&topckgen CLK_TOP_MUX_MM>,
A Dmt8183.dtsi907 clocks = <&topckgen CLK_TOP_MUX_MM>,

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