Searched refs:CLK_TOP_MUX_PWM (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A D	mt6797-clk.h	17 #define CLK_TOP_MUX_PWM 7 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A D	clk-mt6797.c	335 MUX_GATE(CLK_TOP_MUX_PWM, "pwm_sel", pwm_parents, 0x0050, 0, 3, 7),

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