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Searched refs:CLK_TOP_NR_SEL (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt2712-clk.h152 #define CLK_TOP_NR_SEL 121 macro
A Dmt2701-clk.h114 #define CLK_TOP_NR_SEL 103 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt2701.c552 MUX_GATE(CLK_TOP_NR_SEL, "nr_sel", nr_osd_parents,
A Dclk-mt2712.c788 MUX_GATE(CLK_TOP_NR_SEL, "nr_sel",

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