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Searched refs:CLK_TOP_PCIE_PHY_SEL (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt7986-clk.h75 #define CLK_TOP_PCIE_PHY_SEL 52 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt7986-topckgen.c256 MUX_GATE_CLR_SET_UPD(CLK_TOP_PCIE_PHY_SEL, "pcie_phy_sel",

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