CLK_TOP_PE2_MAC_P0_SEL (reference) in projects: linux-6.3-rc2

Searched refs:CLK_TOP_PE2_MAC_P0_SEL (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A D	mt2712-clk.h	`162 #define CLK_TOP_PE2_MAC_P0_SEL 131 macro`
/linux-6.3-rc2/Documentation/devicetree/bindings/pci/
A D	mediatek-pcie.txt	`192 clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>,`
/linux-6.3-rc2/drivers/clk/mediatek/
A D	clk-mt2712.c	`811 MUX_GATE(CLK_TOP_PE2_MAC_P0_SEL, "pe2_mac_p0_sel",`
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A D	mt2712e.dtsi	`965 clocks = <&topckgen CLK_TOP_PE2_MAC_P0_SEL>,`

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