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Searched refs:CLK_TOP_RG_SLOW_MFG (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8167-clk.h53 #define CLK_TOP_RG_SLOW_MFG (CLK_TOP_NR_CLK + 29) macro
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A Dmt8167.dtsi75 <&topckgen CLK_TOP_RG_SLOW_MFG>;
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8167.c892 GATE_TOP3(CLK_TOP_RG_SLOW_MFG, "rg_slow_mfg", "slow_mfg_sel", 7),

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