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Searched refs:CLK_TOP_SENINF1 (Results 1 – 7 of 7) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt6779-clk.h149 #define CLK_TOP_SENINF1 139 macro
A Dmt8186-clk.h49 #define CLK_TOP_SENINF1 30 macro
A Dmt8195-clk.h66 #define CLK_TOP_SENINF1 54 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt8186-topckgen.c584 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "top_seninf1",
A Dclk-mt8195-topckgen.c989 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "top_seninf1",
A Dclk-mt6779.c736 MUX_GATE_CLR_SET_UPD(CLK_TOP_SENINF1, "seninf1_sel",
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A Dmt8186.dtsi436 <&topckgen CLK_TOP_SENINF1>;
508 <&topckgen CLK_TOP_SENINF1>,

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