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Searched refs:CLK_TOP_SPISLV_SEL (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/Documentation/devicetree/bindings/spi/
A Dmediatek,spi-slave-mt27xx.yaml56 assigned-clocks = <&topckgen CLK_TOP_SPISLV_SEL>;
/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt2712-clk.h188 #define CLK_TOP_SPISLV_SEL 157 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt2712.c869 MUX_GATE(CLK_TOP_SPISLV_SEL, "spislv_sel",
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A Dmt2712e.dtsi320 assigned-clocks = <&topckgen CLK_TOP_SPISLV_SEL>;

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