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Searched refs:CLK_TOP_SYSPLL2_D2 (Results 1 – 16 of 16) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt7629-clk.h39 #define CLK_TOP_SYSPLL2_D2 29 macro
A Dmediatek,mt6795-clk.h57 #define CLK_TOP_SYSPLL2_D2 46 macro
A Dmt6797-clk.h53 #define CLK_TOP_SYSPLL2_D2 43 macro
A Dmt6765-clk.h42 #define CLK_TOP_SYSPLL2_D2 7 macro
A Dmt8173-clk.h59 #define CLK_TOP_SYSPLL2_D2 49 macro
A Dmediatek,mt8365-clk.h22 #define CLK_TOP_SYSPLL2_D2 12 macro
A Dmt2712-clk.h42 #define CLK_TOP_SYSPLL2_D2 11 macro
A Dmt2701-clk.h20 #define CLK_TOP_SYSPLL2_D2 10 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt6795-topckgen.c411 FACTOR_FLAGS(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "main_h364m", 1, 2, 0),
A Dclk-mt8173-topckgen.c490 FACTOR_FLAGS(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "main_h364m", 1, 2, 0),
A Dclk-mt7629.c408 FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "mainpll", 1, 6),
A Dclk-mt6797.c35 FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "syspll_d3", 1, 2),
A Dclk-mt2701.c68 FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "syspll_d3", 1, 2),
A Dclk-mt2712.c69 FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "syspll_d3", 1,
A Dclk-mt6765.c90 FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "syspll_d3", 1, 2),
A Dclk-mt8365.c41 FACTOR(CLK_TOP_SYSPLL2_D2, "syspll2_d2", "mainpll", 1, 6),

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