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Searched refs:CLK_TOP_SYSPLL2_D4 (Results 1 – 18 of 18) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt7629-clk.h40 #define CLK_TOP_SYSPLL2_D4 30 macro
A Dmt7622-clk.h34 #define CLK_TOP_SYSPLL2_D4 22 macro
A Dmediatek,mt6795-clk.h58 #define CLK_TOP_SYSPLL2_D4 47 macro
A Dmt6797-clk.h54 #define CLK_TOP_SYSPLL2_D4 44 macro
A Dmt6765-clk.h43 #define CLK_TOP_SYSPLL2_D4 8 macro
A Dmt8173-clk.h60 #define CLK_TOP_SYSPLL2_D4 50 macro
A Dmediatek,mt8365-clk.h23 #define CLK_TOP_SYSPLL2_D4 13 macro
A Dmt2712-clk.h43 #define CLK_TOP_SYSPLL2_D4 12 macro
A Dmt2701-clk.h21 #define CLK_TOP_SYSPLL2_D4 11 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt6795-topckgen.c412 FACTOR_FLAGS(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "main_h364m", 1, 4, 0),
A Dclk-mt8173-topckgen.c491 FACTOR_FLAGS(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "main_h364m", 1, 4, 0),
A Dclk-mt7629.c409 FACTOR(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "mainpll", 1, 12),
A Dclk-mt6797.c36 FACTOR(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "syspll_d3", 1, 4),
A Dclk-mt7622.c401 FACTOR(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "mainpll", 1, 12),
A Dclk-mt2701.c69 FACTOR(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "syspll_d3", 1, 4),
A Dclk-mt2712.c71 FACTOR(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "syspll_d3", 1,
A Dclk-mt6765.c91 FACTOR(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "syspll_d3", 1, 4),
A Dclk-mt8365.c42 FACTOR(CLK_TOP_SYSPLL2_D4, "syspll2_d4", "mainpll", 1, 12),

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