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Searched refs:CLK_TOP_SYSPLL_D3 (Results 1 – 18 of 18) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt8135-clk.h39 #define CLK_TOP_SYSPLL_D3 28 macro
A Dmediatek,mt6795-clk.h56 #define CLK_TOP_SYSPLL_D3 45 macro
A Dmt6797-clk.h51 #define CLK_TOP_SYSPLL_D3 41 macro
A Dmt6765-clk.h41 #define CLK_TOP_SYSPLL_D3 6 macro
A Dmt8173-clk.h58 #define CLK_TOP_SYSPLL_D3 48 macro
A Dmediatek,mt8365-clk.h21 #define CLK_TOP_SYSPLL_D3 11 macro
A Dmt2712-clk.h41 #define CLK_TOP_SYSPLL_D3 10 macro
A Dmt8183-clk.h80 #define CLK_TOP_SYSPLL_D3 44 macro
A Dmt2701-clk.h13 #define CLK_TOP_SYSPLL_D3 3 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt6795-topckgen.c410 FACTOR_FLAGS(CLK_TOP_SYSPLL_D3, "syspll_d3", "main_h364m", 1, 1, 0),
A Dclk-mt8173-topckgen.c489 FACTOR_FLAGS(CLK_TOP_SYSPLL_D3, "syspll_d3", "main_h364m", 1, 1, 0),
A Dclk-mt8135.c55 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll_537p3m", 1, 1),
A Dclk-mt6797.c33 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),
A Dclk-mt2701.c61 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),
A Dclk-mt2712.c67 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "syspll_ck", 1,
A Dclk-mt6765.c89 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),
A Dclk-mt8183.c41 FACTOR_FLAGS(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3, 0),
A Dclk-mt8365.c40 FACTOR(CLK_TOP_SYSPLL_D3, "syspll_d3", "mainpll", 1, 3),

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