Searched refs:CLK_TOP_TL_SEL (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A D	mt8192-clk.h	53 #define CLK_TOP_TL_SEL 41 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A D	clk-mt8192.c	646 MUX_GATE_CLR_SET_UPD(CLK_TOP_TL_SEL, "tl_sel",
/linux-6.3-rc2/arch/arm64/boot/dts/mediatek/
A D	mt8192.dtsi	979 assigned-clocks = <&topckgen CLK_TOP_TL_SEL>;

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