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Searched refs:CLK_TOP_U2U3_SEL (Results 1 – 4 of 4) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dmt7986-clk.h80 #define CLK_TOP_U2U3_SEL 57 macro
A Dmediatek,mt7981-clk.h118 #define CLK_TOP_U2U3_SEL 105 macro
/linux-6.3-rc2/drivers/clk/mediatek/
A Dclk-mt7986-topckgen.c272 MUX_GATE_CLR_SET_UPD(CLK_TOP_U2U3_SEL, "u2u3_sel", f_26m_adc_parents,
A Dclk-mt7981-topckgen.c380 MUX_GATE_CLR_SET_UPD(CLK_TOP_U2U3_SEL, "u2u3_sel", u2u3_parents, 0x070,

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