Searched refs:CLK_TOP_UNIVPLL3_D8 (Results 1 – 10 of 10) sorted by relevance
/linux-6.3-rc2/include/dt-bindings/clock/ |
A D | mediatek,mt6795-clk.h | 81 #define CLK_TOP_UNIVPLL3_D8 70 macro
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A D | mt6797-clk.h | 78 #define CLK_TOP_UNIVPLL3_D8 68 macro
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A D | mt8173-clk.h | 83 #define CLK_TOP_UNIVPLL3_D8 73 macro
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A D | mt2712-clk.h | 67 #define CLK_TOP_UNIVPLL3_D8 36 macro
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A D | mt2701-clk.h | 46 #define CLK_TOP_UNIVPLL3_D8 36 macro
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/linux-6.3-rc2/drivers/clk/mediatek/ |
A D | clk-mt6795-topckgen.c | 437 FACTOR_FLAGS(CLK_TOP_UNIVPLL3_D8, "univpll3_d8", "univ_249p6m", 1, 8, 0),
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A D | clk-mt8173-topckgen.c | 516 FACTOR_FLAGS(CLK_TOP_UNIVPLL3_D8, "univpll3_d8", "univ_249p6m", 1, 8, 0),
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A D | clk-mt6797.c | 60 FACTOR(CLK_TOP_UNIVPLL3_D8, "univpll3_d8", "univpll_d5", 1, 8),
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A D | clk-mt2701.c | 96 FACTOR(CLK_TOP_UNIVPLL3_D8, "univpll3_d8", "univpll_d5", 1, 8),
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A D | clk-mt2712.c | 119 FACTOR(CLK_TOP_UNIVPLL3_D8, "univpll3_d8", "univpll_d5", 1,
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