Searched refs:CLK_TOP_UNIVPLL_D5_D4 (Results 1 – 12 of 12) sorted by relevance
| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | mt6779-clk.h | 81 #define CLK_TOP_UNIVPLL_D5_D4 71 macro
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| A D | mt8183-clk.h | 106 #define CLK_TOP_UNIVPLL_D5_D4 70 macro
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| A D | mt8186-clk.h | 111 #define CLK_TOP_UNIVPLL_D5_D4 92 macro
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| A D | mt8192-clk.h | 105 #define CLK_TOP_UNIVPLL_D5_D4 93 macro
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| A D | mt8195-clk.h | 162 #define CLK_TOP_UNIVPLL_D5_D4 150 macro
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| /linux-6.3-rc2/drivers/clk/mediatek/ |
| A D | clk-mt8186-topckgen.c | 46 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4, 0),
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| A D | clk-mt8195-topckgen.c | 64 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4, 0),
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| A D | clk-mt6779.c | 57 FACTOR(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4),
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| A D | clk-mt8183.c | 62 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4, 0),
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| A D | clk-mt8192.c | 54 FACTOR_FLAGS(CLK_TOP_UNIVPLL_D5_D4, "univpll_d5_d4", "univpll_d5", 1, 4, 0),
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| /linux-6.3-rc2/arch/arm64/boot/dts/mediatek/ |
| A D | mt8195.dtsi | 1216 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
1217 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
1283 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
1284 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
1307 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
1308 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
1331 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
1332 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
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| A D | mt8192.dtsi | 821 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
822 <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
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