| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | exynos5410.h | 39 #define CLK_UART3 260 macro
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| A D | actions,s500-cmu.h | 61 #define CLK_UART3 41 macro
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| A D | actions,s700-cmu.h | 61 #define CLK_UART3 39 macro
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| A D | actions,s900-cmu.h | 88 #define CLK_UART3 70 macro
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| A D | exynos5250.h | 96 #define CLK_UART3 292 macro
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| A D | s5pv210.h | 158 #define CLK_UART3 140 macro
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| A D | exynos4.h | 153 #define CLK_UART3 315 macro
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| A D | exynos5420.h | 69 #define CLK_UART3 260 macro
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| A D | sprd,sc9860-clk.h | 88 #define CLK_UART3 5 macro
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| A D | rockchip,rk3588-cru.h | 193 #define CLK_UART3 178 macro
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| /linux-6.3-rc2/drivers/clk/samsung/ |
| A D | clk-exynos5410.c | 200 GATE(CLK_UART3, "uart3", "aclk66", GATE_IP_PERIC, 3, 0, 0),
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| A D | clk-s5pv210.c | 651 GATE(CLK_UART3, "uart3", "dout_pclkp", CLK_GATE_IP3, 20, 0, 0),
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| A D | clk-exynos5250.c | 576 GATE(CLK_UART3, "uart3", "div_aclk66", GATE_IP_PERIC, 3, 0, 0),
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| A D | clk-exynos4.c | 854 GATE(CLK_UART3, "uart3", "aclk100", GATE_IP_PERIL, 3,
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| A D | clk-exynos5420.c | 1057 GATE(CLK_UART3, "uart3", "mout_user_aclk66_peric",
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| /linux-6.3-rc2/arch/arm64/boot/dts/actions/ |
| A D | s700.dtsi | 143 clocks = <&cmu CLK_UART3>;
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| A D | s900.dtsi | 149 clocks = <&cmu CLK_UART3>;
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| /linux-6.3-rc2/arch/arm/boot/dts/ |
| A D | s5pv210.dtsi | 355 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
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| A D | owl-s500.dtsi | 160 clocks = <&cmu CLK_UART3>;
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| A D | exynos5410.dtsi | 361 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
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| /linux-6.3-rc2/arch/arm64/boot/dts/sprd/ |
| A D | whale2.dtsi | 113 <&ap_clk CLK_UART3>, <&ext_26m>;
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| /linux-6.3-rc2/drivers/clk/actions/ |
| A D | owl-s500.c | 492 [CLK_UART3] = &uart3_clk.common.hw,
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| A D | owl-s700.c | 531 [CLK_UART3] = &clk_uart3.common.hw,
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| A D | owl-s900.c | 679 [CLK_UART3] = &uart3_clk.common.hw,
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| /linux-6.3-rc2/drivers/clk/renesas/ |
| A D | r9a06g032-clocks.c | 309 D_UGATE(CLK_UART3, "clk_uart3", UART_GROUP_34567, 1, 0x760, 0x761, 0x762, 0x763),
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