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Searched refs:CSR_TIMER1_CLR (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/arch/arm/mach-footbridge/
A Ddc21285-timer.c54 *CSR_TIMER1_CLR = 0; in ckevt_dc21285_set_next_event()
69 *CSR_TIMER1_CLR = 0; in ckevt_dc21285_set_periodic()
93 *CSR_TIMER1_CLR = 0; in timer1_interrupt()
/linux-6.3-rc2/arch/arm/include/asm/hardware/
A Ddec21285.h117 #define CSR_TIMER1_CLR DC21285_IO(0x030c) macro

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