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Searched refs:CSR_VSTIMECMPH (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/arch/riscv/kvm/
A Dvcpu_timer.c76 csr_write(CSR_VSTIMECMPH, ncycles >> 32); in kvm_riscv_vcpu_update_vstimecmp()
311 csr_write(CSR_VSTIMECMPH, (u32)(t->next_cycles >> 32)); in kvm_riscv_vcpu_timer_restore()
332 t->next_cycles |= (u64)csr_read(CSR_VSTIMECMPH) << 32; in kvm_riscv_vcpu_timer_sync()
/linux-6.3-rc2/arch/riscv/include/asm/
A Dcsr.h263 #define CSR_VSTIMECMPH 0x25D macro

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