Home
last modified time | relevance | path

Searched refs:CVMX_CIU_PP_RST (Results 1 – 2 of 2) sorted by relevance

/linux-6.3-rc2/arch/mips/cavium-octeon/
A Dsmp.c338 cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid); in octeon_cpu_die()
339 cvmx_write_csr(CVMX_CIU_PP_RST, 0); in octeon_cpu_die()
386 cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid); in octeon_update_boot_vector()
387 cvmx_write_csr(CVMX_CIU_PP_RST, 0); in octeon_update_boot_vector()
/linux-6.3-rc2/arch/mips/include/asm/octeon/
A Dcvmx-ciu-defs.h32 #define CVMX_CIU_PP_RST CVMX_CIU_ADDR(0x0700, 0, 0x00, 0) macro

Completed in 5 milliseconds