Searched refs:DCLK_VOP0 (Results 1 – 25 of 26) sorted by relevance
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| /linux-6.3-rc2/Documentation/devicetree/bindings/display/rockchip/ |
| A D | rockchip-vop.yaml | 110 <&cru DCLK_VOP0>,
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| A D | rockchip-vop2.yaml | 116 <&cru DCLK_VOP0>,
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| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | rk3288-cru.h | 87 #define DCLK_VOP0 190 macro
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| A D | rk3399-cru.h | 129 #define DCLK_VOP0 180 macro
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| A D | rockchip,rk3588-cru.h | 624 #define DCLK_VOP0 609 macro
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| A D | rk3568-cru.h | 286 #define DCLK_VOP0 223 macro
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| /linux-6.3-rc2/arch/arm64/boot/dts/rockchip/ |
| A D | rk3566-radxa-cm3-io.dts | 258 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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| A D | rk3566-box-demo.dts | 468 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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| A D | rk3566-lubancat-1.dts | 581 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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| A D | rk3566-roc-pc.dts | 687 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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| A D | rk3566-soquartz.dtsi | 677 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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| A D | rk3568-evb1-v10.dts | 678 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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| A D | rk3568-lubancat-2.dts | 681 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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| A D | rk3566-quartz64-b.dts | 725 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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| A D | rk3568-odroid-m1.dts | 730 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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| A D | rk3568-bpi-r2-pro.dts | 841 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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| A D | rk3566-anbernic-rgxx3.dtsi | 772 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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| A D | rk3568-rock-3a.dts | 844 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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| A D | rk3566-quartz64-a.dts | 825 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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| A D | rk356x.dtsi | 701 clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>, <&cru DCLK_VOP0>,
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| /linux-6.3-rc2/drivers/clk/rockchip/ |
| A D | clk-rk3288.c | 445 COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
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| A D | clk-rk3399.c | 282 MUX(DCLK_VOP0, "dclk_vop0", mux_dclk_vop0_p, CLK_SET_RATE_PARENT,
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| A D | clk-rk3568.c | 1047 COMPOSITE(DCLK_VOP0, "dclk_vop0", hpll_vpll_gpll_cpll_p, CLK_SET_RATE_NO_REPARENT,
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| A D | clk-rk3588.c | 2113 COMPOSITE_NODIV(DCLK_VOP0, "dclk_vop0", dclk_vop0_p,
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| /linux-6.3-rc2/arch/arm/boot/dts/ |
| A D | rk3288.dtsi | 776 <&cru DCLK_VOP0>,
1023 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
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