/linux-6.3-rc2/drivers/clk/renesas/ |
A D | r8a7795-cpg-mssr.c | 133 DEF_MOD("tmu4", 121, R8A7795_CLK_S0D6), 137 DEF_MOD("tmu0", 125, R8A7795_CLK_CP), 151 DEF_MOD("cmt3", 300, R8A7795_CLK_R), 152 DEF_MOD("cmt2", 301, R8A7795_CLK_R), 153 DEF_MOD("cmt1", 302, R8A7795_CLK_R), 154 DEF_MOD("cmt0", 303, R8A7795_CLK_R), 157 DEF_MOD("sdif3", 311, R8A7795_CLK_SD3), 158 DEF_MOD("sdif2", 312, R8A7795_CLK_SD2), 159 DEF_MOD("sdif1", 313, R8A7795_CLK_SD1), 160 DEF_MOD("sdif0", 314, R8A7795_CLK_SD0), [all …]
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A D | r8a7742-cpg-mssr.c | 84 DEF_MOD("vcp1", 100, R8A7742_CLK_ZS), 85 DEF_MOD("vcp0", 101, R8A7742_CLK_ZS), 88 DEF_MOD("tmu1", 111, R8A7742_CLK_P), 89 DEF_MOD("3dg", 112, R8A7742_CLK_ZG), 94 DEF_MOD("tmu3", 121, R8A7742_CLK_P), 95 DEF_MOD("tmu2", 122, R8A7742_CLK_P), 96 DEF_MOD("cmt0", 124, R8A7742_CLK_R), 116 DEF_MOD("scif2", 310, R8A7742_CLK_P), 126 DEF_MOD("cmt1", 329, R8A7742_CLK_R), 134 DEF_MOD("thermal", 522, CLK_EXTAL), [all …]
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A D | r8a7796-cpg-mssr.c | 138 DEF_MOD("tmu0", 125, R8A7796_CLK_CP), 152 DEF_MOD("cmt3", 300, R8A7796_CLK_R), 153 DEF_MOD("cmt2", 301, R8A7796_CLK_R), 154 DEF_MOD("cmt1", 302, R8A7796_CLK_R), 155 DEF_MOD("cmt0", 303, R8A7796_CLK_R), 158 DEF_MOD("sdif3", 311, R8A7796_CLK_SD3), 159 DEF_MOD("sdif2", 312, R8A7796_CLK_SD2), 160 DEF_MOD("sdif1", 313, R8A7796_CLK_SD1), 161 DEF_MOD("sdif0", 314, R8A7796_CLK_SD0), 167 DEF_MOD("rwdt", 402, R8A7796_CLK_R), [all …]
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A D | r8a77965-cpg-mssr.c | 129 DEF_MOD("tmu4", 121, R8A77965_CLK_S0D6), 133 DEF_MOD("tmu0", 125, R8A77965_CLK_CP), 148 DEF_MOD("cmt3", 300, R8A77965_CLK_R), 149 DEF_MOD("cmt2", 301, R8A77965_CLK_R), 150 DEF_MOD("cmt1", 302, R8A77965_CLK_R), 151 DEF_MOD("cmt0", 303, R8A77965_CLK_R), 154 DEF_MOD("sdif3", 311, R8A77965_CLK_SD3), 155 DEF_MOD("sdif2", 312, R8A77965_CLK_SD2), 156 DEF_MOD("sdif1", 313, R8A77965_CLK_SD1), 157 DEF_MOD("sdif0", 314, R8A77965_CLK_SD0), [all …]
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A D | r8a7743-cpg-mssr.c | 82 DEF_MOD("vcp0", 101, R8A7743_CLK_ZS), 83 DEF_MOD("vpc0", 103, R8A7743_CLK_ZS), 84 DEF_MOD("tmu1", 111, R8A7743_CLK_P), 85 DEF_MOD("3dg", 112, R8A7743_CLK_ZG), 89 DEF_MOD("tmu3", 121, R8A7743_CLK_P), 90 DEF_MOD("tmu2", 122, R8A7743_CLK_P), 91 DEF_MOD("cmt0", 124, R8A7743_CLK_R), 115 DEF_MOD("cmt1", 329, R8A7743_CLK_R), 118 DEF_MOD("rwdt", 402, R8A7743_CLK_R), 123 DEF_MOD("thermal", 522, CLK_EXTAL), [all …]
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A D | r8a7791-cpg-mssr.c | 90 DEF_MOD("vcp0", 101, R8A7791_CLK_ZS), 92 DEF_MOD("jpu", 106, R8A7791_CLK_M2), 94 DEF_MOD("tmu1", 111, R8A7791_CLK_P), 95 DEF_MOD("3dg", 112, R8A7791_CLK_ZG), 99 DEF_MOD("tmu3", 121, R8A7791_CLK_P), 100 DEF_MOD("tmu2", 122, R8A7791_CLK_P), 101 DEF_MOD("cmt0", 124, R8A7791_CLK_R), 125 DEF_MOD("cmt1", 329, R8A7791_CLK_R), 128 DEF_MOD("rwdt", 402, R8A7791_CLK_R), 134 DEF_MOD("thermal", 522, CLK_EXTAL), [all …]
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A D | r8a7790-cpg-mssr.c | 97 DEF_MOD("jpu", 106, R8A7790_CLK_M2), 99 DEF_MOD("tmu1", 111, R8A7790_CLK_P), 100 DEF_MOD("3dg", 112, R8A7790_CLK_ZG), 105 DEF_MOD("tmu3", 121, R8A7790_CLK_P), 106 DEF_MOD("tmu2", 122, R8A7790_CLK_P), 107 DEF_MOD("cmt0", 124, R8A7790_CLK_R), 127 DEF_MOD("scif2", 310, R8A7790_CLK_P), 137 DEF_MOD("cmt1", 329, R8A7790_CLK_R), 140 DEF_MOD("rwdt", 402, R8A7790_CLK_R), 146 DEF_MOD("thermal", 522, CLK_EXTAL), [all …]
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A D | r8a774e1-cpg-mssr.c | 133 DEF_MOD("tmu0", 125, R8A774E1_CLK_CP), 148 DEF_MOD("cmt3", 300, R8A774E1_CLK_R), 149 DEF_MOD("cmt2", 301, R8A774E1_CLK_R), 150 DEF_MOD("cmt1", 302, R8A774E1_CLK_R), 151 DEF_MOD("cmt0", 303, R8A774E1_CLK_R), 154 DEF_MOD("sdif3", 311, R8A774E1_CLK_SD3), 155 DEF_MOD("sdif2", 312, R8A774E1_CLK_SD2), 156 DEF_MOD("sdif1", 313, R8A774E1_CLK_SD1), 157 DEF_MOD("sdif0", 314, R8A774E1_CLK_SD0), 163 DEF_MOD("rwdt", 402, R8A774E1_CLK_R), [all …]
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A D | r8a7745-cpg-mssr.c | 82 DEF_MOD("vcp0", 101, R8A7745_CLK_ZS), 83 DEF_MOD("vpc0", 103, R8A7745_CLK_ZS), 84 DEF_MOD("tmu1", 111, R8A7745_CLK_P), 85 DEF_MOD("3dg", 112, R8A7745_CLK_ZG), 88 DEF_MOD("tmu3", 121, R8A7745_CLK_P), 89 DEF_MOD("tmu2", 122, R8A7745_CLK_P), 90 DEF_MOD("cmt0", 124, R8A7745_CLK_R), 111 DEF_MOD("cmt1", 329, R8A7745_CLK_R), 114 DEF_MOD("rwdt", 402, R8A7745_CLK_R), 118 DEF_MOD("pwm", 523, R8A7745_CLK_P), [all …]
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A D | r8a7794-cpg-mssr.c | 90 DEF_MOD("jpu", 106, R8A7794_CLK_M2), 91 DEF_MOD("tmu1", 111, R8A7794_CLK_P), 92 DEF_MOD("3dg", 112, R8A7794_CLK_ZG), 95 DEF_MOD("tmu3", 121, R8A7794_CLK_P), 96 DEF_MOD("tmu2", 122, R8A7794_CLK_P), 97 DEF_MOD("cmt0", 124, R8A7794_CLK_R), 118 DEF_MOD("cmt1", 329, R8A7794_CLK_R), 121 DEF_MOD("rwdt", 402, R8A7794_CLK_R), 126 DEF_MOD("pwm", 523, R8A7794_CLK_P), 130 DEF_MOD("scif5", 714, R8A7794_CLK_P), [all …]
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A D | r8a774a1-cpg-mssr.c | 130 DEF_MOD("tmu0", 125, R8A774A1_CLK_CP), 144 DEF_MOD("cmt3", 300, R8A774A1_CLK_R), 145 DEF_MOD("cmt2", 301, R8A774A1_CLK_R), 146 DEF_MOD("cmt1", 302, R8A774A1_CLK_R), 147 DEF_MOD("cmt0", 303, R8A774A1_CLK_R), 149 DEF_MOD("sdif3", 311, R8A774A1_CLK_SD3), 150 DEF_MOD("sdif2", 312, R8A774A1_CLK_SD2), 151 DEF_MOD("sdif1", 313, R8A774A1_CLK_SD1), 152 DEF_MOD("sdif0", 314, R8A774A1_CLK_SD0), 158 DEF_MOD("rwdt", 402, R8A774A1_CLK_R), [all …]
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A D | r8a774b1-cpg-mssr.c | 127 DEF_MOD("tmu0", 125, R8A774B1_CLK_CP), 141 DEF_MOD("cmt3", 300, R8A774B1_CLK_R), 142 DEF_MOD("cmt2", 301, R8A774B1_CLK_R), 143 DEF_MOD("cmt1", 302, R8A774B1_CLK_R), 144 DEF_MOD("cmt0", 303, R8A774B1_CLK_R), 147 DEF_MOD("sdif3", 311, R8A774B1_CLK_SD3), 148 DEF_MOD("sdif2", 312, R8A774B1_CLK_SD2), 149 DEF_MOD("sdif1", 313, R8A774B1_CLK_SD1), 150 DEF_MOD("sdif0", 314, R8A774B1_CLK_SD0), 156 DEF_MOD("rwdt", 402, R8A774B1_CLK_R), [all …]
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A D | r8a77990-cpg-mssr.c | 140 DEF_MOD("tmu0", 125, R8A77990_CLK_CP), 155 DEF_MOD("cmt3", 300, R8A77990_CLK_R), 156 DEF_MOD("cmt2", 301, R8A77990_CLK_R), 157 DEF_MOD("cmt1", 302, R8A77990_CLK_R), 158 DEF_MOD("cmt0", 303, R8A77990_CLK_R), 160 DEF_MOD("sdif3", 311, R8A77990_CLK_SD3), 161 DEF_MOD("sdif1", 313, R8A77990_CLK_SD1), 162 DEF_MOD("sdif0", 314, R8A77990_CLK_SD0), 168 DEF_MOD("rwdt", 402, R8A77990_CLK_R), 205 DEF_MOD("du1", 723, R8A77990_CLK_S1D1), [all …]
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A D | r8a77470-cpg-mssr.c | 78 DEF_MOD("vcp0", 101, R8A77470_CLK_ZS), 80 DEF_MOD("tmu1", 111, R8A77470_CLK_P), 81 DEF_MOD("3dg", 112, R8A77470_CLK_ZS), 84 DEF_MOD("tmu3", 121, R8A77470_CLK_P), 85 DEF_MOD("tmu2", 122, R8A77470_CLK_P), 86 DEF_MOD("cmt0", 124, R8A77470_CLK_R), 98 DEF_MOD("cmt1", 329, R8A77470_CLK_R), 101 DEF_MOD("rwdt", 402, R8A77470_CLK_R), 105 DEF_MOD("pwm", 523, R8A77470_CLK_P), 111 DEF_MOD("scif5", 714, R8A77470_CLK_P), [all …]
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A D | r8a774c0-cpg-mssr.c | 139 DEF_MOD("tmu0", 125, R8A774C0_CLK_CP), 153 DEF_MOD("cmt3", 300, R8A774C0_CLK_R), 154 DEF_MOD("cmt2", 301, R8A774C0_CLK_R), 155 DEF_MOD("cmt1", 302, R8A774C0_CLK_R), 156 DEF_MOD("cmt0", 303, R8A774C0_CLK_R), 158 DEF_MOD("sdif3", 311, R8A774C0_CLK_SD3), 159 DEF_MOD("sdif1", 313, R8A774C0_CLK_SD1), 160 DEF_MOD("sdif0", 314, R8A774C0_CLK_SD0), 166 DEF_MOD("rwdt", 402, R8A774C0_CLK_R), 193 DEF_MOD("du1", 723, R8A774C0_CLK_S1D1), [all …]
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A D | r8a779a0-cpg-mssr.c | 147 DEF_MOD("du", 411, R8A779A0_CLK_S3D1), 148 DEF_MOD("dsi0", 415, R8A779A0_CLK_DSI), 221 DEF_MOD("rwdt", 907, R8A779A0_CLK_R), 222 DEF_MOD("cmt0", 910, R8A779A0_CLK_R), 223 DEF_MOD("cmt1", 911, R8A779A0_CLK_R), 224 DEF_MOD("cmt2", 912, R8A779A0_CLK_R), 225 DEF_MOD("cmt3", 913, R8A779A0_CLK_R), 226 DEF_MOD("pfc0", 915, R8A779A0_CLK_CP), 227 DEF_MOD("pfc1", 916, R8A779A0_CLK_CP), 228 DEF_MOD("pfc2", 917, R8A779A0_CLK_CP), [all …]
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A D | r8a7792-cpg-mssr.c | 81 DEF_MOD("jpu", 106, R8A7792_CLK_M2), 82 DEF_MOD("tmu1", 111, R8A7792_CLK_P), 83 DEF_MOD("3dg", 112, R8A7792_CLK_ZG), 85 DEF_MOD("tmu3", 121, R8A7792_CLK_P), 86 DEF_MOD("tmu2", 122, R8A7792_CLK_P), 87 DEF_MOD("cmt0", 124, R8A7792_CLK_R), 97 DEF_MOD("cmt1", 329, R8A7792_CLK_R), 98 DEF_MOD("rwdt", 402, R8A7792_CLK_R), 102 DEF_MOD("thermal", 522, CLK_EXTAL), 103 DEF_MOD("pwm", 523, R8A7792_CLK_P), [all …]
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A D | r8a77995-cpg-mssr.c | 126 DEF_MOD("tmu0", 125, R8A77995_CLK_CP), 140 DEF_MOD("cmt3", 300, R8A77995_CLK_R), 141 DEF_MOD("cmt2", 301, R8A77995_CLK_R), 142 DEF_MOD("cmt1", 302, R8A77995_CLK_R), 143 DEF_MOD("cmt0", 303, R8A77995_CLK_R), 145 DEF_MOD("emmc0", 312, R8A77995_CLK_SD0), 148 DEF_MOD("rwdt", 402, R8A77995_CLK_R), 166 DEF_MOD("du1", 723, R8A77995_CLK_S1D1), 167 DEF_MOD("du0", 724, R8A77995_CLK_S1D1), 169 DEF_MOD("mlp", 802, R8A77995_CLK_S2D1), [all …]
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A D | r8a77980-cpg-mssr.c | 119 DEF_MOD("tmu0", 125, R8A77980_CLK_CP), 130 DEF_MOD("cmt3", 300, R8A77980_CLK_R), 131 DEF_MOD("cmt2", 301, R8A77980_CLK_R), 132 DEF_MOD("cmt1", 302, R8A77980_CLK_R), 133 DEF_MOD("cmt0", 303, R8A77980_CLK_R), 137 DEF_MOD("rwdt", 402, R8A77980_CLK_R), 168 DEF_MOD("gpio5", 907, R8A77980_CLK_CP), 169 DEF_MOD("gpio4", 908, R8A77980_CLK_CP), 170 DEF_MOD("gpio3", 909, R8A77980_CLK_CP), 171 DEF_MOD("gpio2", 910, R8A77980_CLK_CP), [all …]
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A D | r8a77970-cpg-mssr.c | 114 DEF_MOD("tmu0", 125, R8A77970_CLK_CP), 127 DEF_MOD("cmt3", 300, R8A77970_CLK_R), 128 DEF_MOD("cmt2", 301, R8A77970_CLK_R), 129 DEF_MOD("cmt1", 302, R8A77970_CLK_R), 130 DEF_MOD("cmt0", 303, R8A77970_CLK_R), 133 DEF_MOD("rwdt", 402, R8A77970_CLK_R), 152 DEF_MOD("gpio5", 907, R8A77970_CLK_CP), 153 DEF_MOD("gpio4", 908, R8A77970_CLK_CP), 154 DEF_MOD("gpio3", 909, R8A77970_CLK_CP), 155 DEF_MOD("gpio2", 910, R8A77970_CLK_CP), [all …]
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A D | r9a09g011-cpg.c | 148 DEF_MOD("pfc", R9A09G011_PFC_PCLK, CLK_MAIN, 0x400, 2), 149 DEF_MOD("gic", R9A09G011_GIC_CLK, CLK_SEL_B_D2, 0x400, 5), 158 DEF_MOD("emm_aclk", R9A09G011_EMM_ACLK, CLK_SEL_D, 0x408, 8), 167 DEF_MOD("usb_pclk", R9A09G011_USB_PCLK, CLK_SEL_E, 0x40c, 6), 171 DEF_MOD("tim_clk_8", R9A09G011_TIM8_CLK, CLK_MAIN_2, 0x424, 4), 172 DEF_MOD("tim_clk_9", R9A09G011_TIM9_CLK, CLK_MAIN_2, 0x424, 5), 192 DEF_MOD("pwm8_clk", R9A09G011_PWM8_CLK, CLK_MAIN, 0x434, 4), 193 DEF_MOD("pwm9_clk", R9A09G011_PWM9_CLK, CLK_MAIN, 0x434, 5), 199 DEF_MOD("urt_pclk", R9A09G011_URT_PCLK, CLK_SEL_E, 0x438, 4), 200 DEF_MOD("urt0_clk", R9A09G011_URT0_CLK, CLK_SEL_W0, 0x438, 5), [all …]
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A D | r9a07g044-cpg.c | 195 DEF_MOD("ia55_clk", R9A07G044_IA55_CLK, R9A07G044_CLK_P1, 199 DEF_MOD("dmac_pclk", R9A07G044_DMAC_PCLK, CLK_P1_DIV2, 209 DEF_MOD("gpt_pclk", R9A07G044_GPT_PCLK, R9A07G044_CLK_P0, 247 DEF_MOD("gpu_clk", R9A07G044_GPU_CLK, R9A07G044_CLK_G, 311 DEF_MOD("i2c0", R9A07G044_I2C0_PCLK, R9A07G044_CLK_P0, 313 DEF_MOD("i2c1", R9A07G044_I2C1_PCLK, R9A07G044_CLK_P0, 315 DEF_MOD("i2c2", R9A07G044_I2C2_PCLK, R9A07G044_CLK_P0, 317 DEF_MOD("i2c3", R9A07G044_I2C3_PCLK, R9A07G044_CLK_P0, 329 DEF_MOD("sci0", R9A07G044_SCI0_CLKP, R9A07G044_CLK_P0, 331 DEF_MOD("sci1", R9A07G044_SCI1_CLKP, R9A07G044_CLK_P0, [all …]
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A D | r9a07g043-cpg.c | 138 DEF_MOD("ia55_clk", R9A07G043_IA55_CLK, R9A07G043_CLK_P1, 149 DEF_MOD("dmac_pclk", R9A07G043_DMAC_PCLK, CLK_P1_DIV2, 213 DEF_MOD("i2c0", R9A07G043_I2C0_PCLK, R9A07G043_CLK_P0, 215 DEF_MOD("i2c1", R9A07G043_I2C1_PCLK, R9A07G043_CLK_P0, 217 DEF_MOD("i2c2", R9A07G043_I2C2_PCLK, R9A07G043_CLK_P0, 219 DEF_MOD("i2c3", R9A07G043_I2C3_PCLK, R9A07G043_CLK_P0, 231 DEF_MOD("sci0", R9A07G043_SCI0_CLKP, R9A07G043_CLK_P0, 233 DEF_MOD("sci1", R9A07G043_SCI1_CLKP, R9A07G043_CLK_P0, 235 DEF_MOD("rspi0", R9A07G043_RSPI0_CLKB, R9A07G043_CLK_P0, 237 DEF_MOD("rspi1", R9A07G043_RSPI1_CLKB, R9A07G043_CLK_P0, [all …]
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A D | r8a779g0-cpg-mssr.c | 184 DEF_MOD("msi0", 618, R8A779G0_CLK_MSO), 185 DEF_MOD("msi1", 619, R8A779G0_CLK_MSO), 186 DEF_MOD("msi2", 620, R8A779G0_CLK_MSO), 187 DEF_MOD("msi3", 621, R8A779G0_CLK_MSO), 188 DEF_MOD("msi4", 622, R8A779G0_CLK_MSO), 189 DEF_MOD("msi5", 623, R8A779G0_CLK_MSO), 196 DEF_MOD("sdhi", 706, R8A779G0_CLK_SD0), 208 DEF_MOD("cmt0", 910, R8A779G0_CLK_R), 209 DEF_MOD("cmt1", 911, R8A779G0_CLK_R), 210 DEF_MOD("cmt2", 912, R8A779G0_CLK_R), [all …]
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A D | r8a779f0-cpg-mssr.c | 141 DEF_MOD("msiof0", 618, R8A779F0_CLK_MSO), 142 DEF_MOD("msiof1", 619, R8A779F0_CLK_MSO), 143 DEF_MOD("msiof2", 620, R8A779F0_CLK_MSO), 144 DEF_MOD("msiof3", 621, R8A779F0_CLK_MSO), 145 DEF_MOD("pcie0", 624, R8A779F0_CLK_S0D2), 146 DEF_MOD("pcie1", 625, R8A779F0_CLK_S0D2), 159 DEF_MOD("wdt", 907, R8A779F0_CLK_R), 160 DEF_MOD("cmt0", 910, R8A779F0_CLK_R), 161 DEF_MOD("cmt1", 911, R8A779F0_CLK_R), 162 DEF_MOD("cmt2", 912, R8A779F0_CLK_R), [all …]
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