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Searched refs:DISP_CC_MDSS_AHB_CLK (Results 1 – 25 of 64) sorted by relevance

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/linux-6.3-rc2/Documentation/devicetree/bindings/display/msm/
A Dqcom,sm8150-mdss.yaml90 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
112 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
183 <&dispcc DISP_CC_MDSS_AHB_CLK>,
255 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
273 <&dispcc DISP_CC_MDSS_AHB_CLK>,
326 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
A Dqcom,sm8250-mdss.yaml92 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
114 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
185 <&dispcc DISP_CC_MDSS_AHB_CLK>,
257 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
275 <&dispcc DISP_CC_MDSS_AHB_CLK>,
328 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
A Dqcom,sm8450-mdss.yaml86 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
110 <&dispcc DISP_CC_MDSS_AHB_CLK>,
191 <&dispcc DISP_CC_MDSS_AHB_CLK>,
268 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
286 <&dispcc DISP_CC_MDSS_AHB_CLK>,
339 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
A Dqcom,sdm845-mdss.yaml109 <&dispcc DISP_CC_MDSS_AHB_CLK>,
152 <&dispcc DISP_CC_MDSS_AHB_CLK>,
204 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
222 <&dispcc DISP_CC_MDSS_AHB_CLK>,
274 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
A Dqcom,sc7280-mdss.yaml101 <&dispcc DISP_CC_MDSS_AHB_CLK>,
126 <&dispcc DISP_CC_MDSS_AHB_CLK>,
181 <&dispcc DISP_CC_MDSS_AHB_CLK>,
253 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
273 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
364 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
A Dqcom,sc7180-mdss.yaml93 <&dispcc DISP_CC_MDSS_AHB_CLK>,
115 <&dispcc DISP_CC_MDSS_AHB_CLK>,
160 <&dispcc DISP_CC_MDSS_AHB_CLK>,
231 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
249 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
A Dqcom,sm6115-mdss.yaml90 <&dispcc DISP_CC_MDSS_AHB_CLK>,
128 <&dispcc DISP_CC_MDSS_AHB_CLK>,
177 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
A Dqcom,qcm2290-mdss.yaml107 <&dispcc DISP_CC_MDSS_AHB_CLK>,
144 <&dispcc DISP_CC_MDSS_AHB_CLK>,
195 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
A Dqcom,sm8350-mdss.yaml92 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
116 <&dispcc DISP_CC_MDSS_AHB_CLK>,
185 <&dispcc DISP_CC_MDSS_AHB_CLK>,
A Dqcom,sc8280xp-mdss.yaml67 <&dispcc0 DISP_CC_MDSS_AHB_CLK>,
97 <&dispcc0 DISP_CC_MDSS_AHB_CLK>,
A Ddsi-phy-14nm.yaml63 clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
/linux-6.3-rc2/include/dt-bindings/clock/
A Dqcom,dispcc-qcm2290.h11 #define DISP_CC_MDSS_AHB_CLK 1 macro
A Dqcom,sm6115-dispcc.h12 #define DISP_CC_MDSS_AHB_CLK 2 macro
A Dqcom,sm6375-dispcc.h12 #define DISP_CC_MDSS_AHB_CLK 1 macro
A Dqcom,dispcc-sm6125.h10 #define DISP_CC_MDSS_AHB_CLK 1 macro
A Dqcom,dispcc-sc7180.h11 #define DISP_CC_MDSS_AHB_CLK 2 macro
A Dqcom,dispcc-sm6350.h12 #define DISP_CC_MDSS_AHB_CLK 1 macro
A Dqcom,dispcc-sdm845.h10 #define DISP_CC_MDSS_AHB_CLK 0 macro
A Dqcom,dispcc-sc7280.h11 #define DISP_CC_MDSS_AHB_CLK 1 macro
A Dqcom,dispcc-sm8150.h10 #define DISP_CC_MDSS_AHB_CLK 0 macro
A Dqcom,dispcc-sm8250.h10 #define DISP_CC_MDSS_AHB_CLK 0 macro
A Dqcom,dispcc-sm8350.h10 #define DISP_CC_MDSS_AHB_CLK 0 macro
A Dqcom,dispcc-sc8280xp.h15 #define DISP_CC_MDSS_AHB_CLK 5 macro
A Dqcom,sm8450-dispcc.h11 #define DISP_CC_MDSS_AHB_CLK 1 macro
A Dqcom,sm8550-dispcc.h12 #define DISP_CC_MDSS_AHB_CLK 2 macro

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