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Searched refs:DISP_CC_MDSS_BYTE0_INTF_CLK (Results 1 – 25 of 46) sorted by relevance

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/linux-6.3-rc2/include/dt-bindings/clock/
A Dqcom,dispcc-qcm2290.h16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
A Dqcom,sm6115-dispcc.h17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 7 macro
A Dqcom,sm6375-dispcc.h17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
A Dqcom,dispcc-sm6125.h14 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 macro
A Dqcom,dispcc-sc7180.h16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 7 macro
A Dqcom,dispcc-sm6350.h17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
A Dqcom,dispcc-sdm845.h14 #define DISP_CC_MDSS_BYTE0_INTF_CLK 4 macro
A Dqcom,dispcc-sc7280.h16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
A Dqcom,dispcc-sm8150.h15 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 macro
A Dqcom,dispcc-sm8250.h15 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 macro
A Dqcom,dispcc-sm8350.h15 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 macro
A Dqcom,dispcc-sc8280xp.h20 #define DISP_CC_MDSS_BYTE0_INTF_CLK 10 macro
A Dqcom,sm8450-dispcc.h16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 6 macro
A Dqcom,sm8550-dispcc.h17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 7 macro
/linux-6.3-rc2/Documentation/devicetree/bindings/display/msm/
A Dqcom,sm6115-mdss.yaml125 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
A Dqcom,qcm2290-mdss.yaml141 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
A Dqcom,sm8350-mdss.yaml182 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
A Dqcom,sdm845-mdss.yaml149 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
A Dqcom,sm8150-mdss.yaml180 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
A Dqcom,sm8250-mdss.yaml182 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
A Dqcom,sm8450-mdss.yaml188 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
A Dqcom,sc7180-mdss.yaml157 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
/linux-6.3-rc2/drivers/clk/qcom/
A Ddispcc-qcm2290.c467 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
A Ddispcc-sm6375.c523 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,
A Ddispcc-sm6115.c536 [DISP_CC_MDSS_BYTE0_INTF_CLK] = &disp_cc_mdss_byte0_intf_clk.clkr,

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