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Searched refs:DISP_CC_MDSS_BYTE1_CLK (Results 1 – 22 of 22) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/clock/
A Dqcom,dispcc-sdm845.h15 #define DISP_CC_MDSS_BYTE1_CLK 5 macro
A Dqcom,dispcc-sm8150.h16 #define DISP_CC_MDSS_BYTE1_CLK 6 macro
A Dqcom,dispcc-sm8250.h16 #define DISP_CC_MDSS_BYTE1_CLK 6 macro
A Dqcom,dispcc-sm8350.h16 #define DISP_CC_MDSS_BYTE1_CLK 6 macro
A Dqcom,dispcc-sc8280xp.h21 #define DISP_CC_MDSS_BYTE1_CLK 11 macro
A Dqcom,sm8450-dispcc.h17 #define DISP_CC_MDSS_BYTE1_CLK 7 macro
A Dqcom,sm8550-dispcc.h18 #define DISP_CC_MDSS_BYTE1_CLK 8 macro
/linux-6.3-rc2/Documentation/devicetree/bindings/display/msm/
A Dqcom,sdm845-mdss.yaml218 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
A Dqcom,sm8150-mdss.yaml269 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
A Dqcom,sm8250-mdss.yaml271 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
A Dqcom,sm8450-mdss.yaml282 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
/linux-6.3-rc2/drivers/clk/qcom/
A Ddispcc-sdm845.c777 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
A Ddispcc-sm8250.c1164 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
A Ddispcc-sc8280xp.c2890 [DISP_CC_MDSS_BYTE1_CLK] = &disp0_cc_mdss_byte1_clk.clkr,
2972 [DISP_CC_MDSS_BYTE1_CLK] = &disp1_cc_mdss_byte1_clk.clkr,
A Ddispcc-sm8450.c1651 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
A Ddispcc-sm8550.c1639 [DISP_CC_MDSS_BYTE1_CLK] = &disp_cc_mdss_byte1_clk.clkr,
/linux-6.3-rc2/arch/arm64/boot/dts/qcom/
A Dsm8350.dtsi2529 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
A Dsm8550.dtsi2290 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
A Dsm8150.dtsi3786 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
A Dsm8450.dtsi2898 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
A Dsdm845.dtsi4620 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
A Dsm8250.dtsi4167 clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,

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