Searched refs:DISP_CC_MDSS_PCLK0_CLK (Results 1 – 25 of 46) sorted by relevance
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| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | qcom,dispcc-qcm2290.h | 23 #define DISP_CC_MDSS_PCLK0_CLK 13 macro
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| A D | qcom,sm6115-dispcc.h | 24 #define DISP_CC_MDSS_PCLK0_CLK 14 macro
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| A D | qcom,sm6375-dispcc.h | 24 #define DISP_CC_MDSS_PCLK0_CLK 13 macro
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| A D | qcom,dispcc-sm6125.h | 30 #define DISP_CC_MDSS_PCLK0_CLK 21 macro
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| A D | qcom,dispcc-sc7180.h | 33 #define DISP_CC_MDSS_PCLK0_CLK 24 macro
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| A D | qcom,dispcc-sm6350.h | 34 #define DISP_CC_MDSS_PCLK0_CLK 23 macro
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| A D | qcom,dispcc-sdm845.h | 25 #define DISP_CC_MDSS_PCLK0_CLK 15 macro
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| A D | qcom,dispcc-sc7280.h | 41 #define DISP_CC_MDSS_PCLK0_CLK 31 macro
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| A D | qcom,dispcc-sm8150.h | 46 #define DISP_CC_MDSS_PCLK0_CLK 36 macro
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| A D | qcom,dispcc-sm8250.h | 46 #define DISP_CC_MDSS_PCLK0_CLK 36 macro
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| A D | qcom,dispcc-sm8350.h | 46 #define DISP_CC_MDSS_PCLK0_CLK 36 macro
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| A D | qcom,dispcc-sc8280xp.h | 75 #define DISP_CC_MDSS_PCLK0_CLK 65 macro
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| A D | qcom,sm8450-dispcc.h | 75 #define DISP_CC_MDSS_PCLK0_CLK 65 macro
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| A D | qcom,sm8550-dispcc.h | 76 #define DISP_CC_MDSS_PCLK0_CLK 66 macro
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| /linux-6.3-rc2/Documentation/devicetree/bindings/display/msm/ |
| A D | qcom,sm6115-mdss.yaml | 126 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
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| A D | qcom,qcm2290-mdss.yaml | 142 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
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| A D | qcom,sm8350-mdss.yaml | 183 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
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| A D | qcom,sdm845-mdss.yaml | 150 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
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| A D | qcom,sm8150-mdss.yaml | 181 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
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| A D | qcom,sm8250-mdss.yaml | 183 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
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| A D | qcom,sm8450-mdss.yaml | 189 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
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| A D | qcom,sc7180-mdss.yaml | 158 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
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| /linux-6.3-rc2/drivers/clk/qcom/ |
| A D | dispcc-qcm2290.c | 474 [DISP_CC_MDSS_PCLK0_CLK] = &disp_cc_mdss_pclk0_clk.clkr,
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| A D | dispcc-sm6375.c | 530 [DISP_CC_MDSS_PCLK0_CLK] = &disp_cc_mdss_pclk0_clk.clkr,
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| A D | dispcc-sm6115.c | 543 [DISP_CC_MDSS_PCLK0_CLK] = &disp_cc_mdss_pclk0_clk.clkr,
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