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Searched refs:DMA_CHAN_TX_CONTROL (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/drivers/net/ethernet/stmicro/stmmac/
A Ddwmac4_dma.c96 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_dma_init_tx_chan()
102 writel(value, ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_dma_init_tx_chan()
184 reg_space[DMA_CHAN_TX_CONTROL(channel) / 4] = in _dwmac4_dump_dma_regs()
185 readl(ioaddr + DMA_CHAN_TX_CONTROL(channel)); in _dwmac4_dump_dma_regs()
451 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_enable_tso()
453 ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_enable_tso()
456 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_enable_tso()
458 ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_enable_tso()
503 u32 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_enable_tbs()
510 writel(value, ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_enable_tbs()
[all …]
A Ddwmac4_lib.c40 u32 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_dma_start_tx()
43 writel(value, ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_dma_start_tx()
52 u32 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_dma_stop_tx()
55 writel(value, ioaddr + DMA_CHAN_TX_CONTROL(chan)); in dwmac4_dma_stop_tx()
A Ddwmac4_dma.h103 #define DMA_CHAN_TX_CONTROL(x) (DMA_CHANX_BASE_ADDR(x) + 0x4) macro

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