Searched refs:DP83867_CLK_O_SEL_CHN_A_RCLK (Results 1 – 2 of 2) sorted by relevance
38 #define DP83867_CLK_O_SEL_CHN_A_RCLK 0x0 macro
137 ti,clk-output-sel = <DP83867_CLK_O_SEL_CHN_A_RCLK>;
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