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Searched refs:DSCC_PPS_CONFIG0 (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_dsc.h41 SRI(DSCC_PPS_CONFIG0, DSCC, id),\
455 uint32_t DSCC_PPS_CONFIG0; member
A Ddcn20_dsc.c636 REG_SET_3(DSCC_PPS_CONFIG0, 0, in dsc_write_to_registers()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn32/
A Ddcn32_resource.h732 SRI_ARR(DSCC_PPS_CONFIG0, DSCC, id), \

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