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Searched refs:DTBCLK_P_CNTL (Results 1 – 6 of 6) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn32/
A Ddcn32_dccg.h66 SR(DTBCLK_P_CNTL),\
141 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P0_SRC_SEL, mask_sh),\
142 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P0_EN, mask_sh),\
143 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P1_SRC_SEL, mask_sh),\
144 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P1_EN, mask_sh),\
145 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P2_SRC_SEL, mask_sh),\
146 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P2_EN, mask_sh),\
147 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P3_SRC_SEL, mask_sh),\
148 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P3_EN, mask_sh),\
A Ddcn32_dccg.c149 REG_UPDATE(DTBCLK_P_CNTL, in dccg32_set_dtbclk_p_src()
152 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg32_set_dtbclk_p_src()
158 REG_UPDATE(DTBCLK_P_CNTL, in dccg32_set_dtbclk_p_src()
161 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg32_set_dtbclk_p_src()
167 REG_UPDATE(DTBCLK_P_CNTL, in dccg32_set_dtbclk_p_src()
170 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg32_set_dtbclk_p_src()
176 REG_UPDATE(DTBCLK_P_CNTL, in dccg32_set_dtbclk_p_src()
179 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg32_set_dtbclk_p_src()
A Ddcn32_resource.h1279 SR(OTG_PIXEL_RATE_DIV), SR(DTBCLK_P_CNTL), SR(DCCG_AUDIO_DTO_SOURCE) \
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn314/
A Ddcn314_dccg.c152 REG_UPDATE(DTBCLK_P_CNTL, in dccg314_set_dtbclk_p_src()
155 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg314_set_dtbclk_p_src()
161 REG_UPDATE(DTBCLK_P_CNTL, in dccg314_set_dtbclk_p_src()
164 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg314_set_dtbclk_p_src()
170 REG_UPDATE(DTBCLK_P_CNTL, in dccg314_set_dtbclk_p_src()
173 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg314_set_dtbclk_p_src()
179 REG_UPDATE(DTBCLK_P_CNTL, in dccg314_set_dtbclk_p_src()
182 REG_UPDATE_2(DTBCLK_P_CNTL, in dccg314_set_dtbclk_p_src()
A Ddcn314_dccg.h76 SR(DTBCLK_P_CNTL),\
135 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P0_SRC_SEL, mask_sh),\
136 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P0_EN, mask_sh),\
137 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P1_SRC_SEL, mask_sh),\
138 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P1_EN, mask_sh),\
139 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P2_SRC_SEL, mask_sh),\
140 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P2_EN, mask_sh),\
141 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P3_SRC_SEL, mask_sh),\
142 DCCG_SF(DTBCLK_P_CNTL, DTBCLK_P3_EN, mask_sh),\
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_dccg.h283 uint32_t DTBCLK_P_CNTL; member

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