Home
last modified time | relevance | path

Searched refs:DWB_OGAM_RAMA_START_BASE_CNTL_R (Results 1 – 3 of 3) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_dwb.h75 SR(DWB_OGAM_RAMA_START_BASE_CNTL_R),\
233 …SF_DWB2(DWB_OGAM_RAMA_START_BASE_CNTL_R, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION_START_BASE_R, mask_sh)…
780 uint32_t DWB_OGAM_RAMA_START_BASE_CNTL_R; member
A Ddcn30_dwb_cm.c94 gam_regs.start_base_cntl_r = REG(DWB_OGAM_RAMA_START_BASE_CNTL_R); in dwb3_program_ogam_luta_settings()
/linux-6.3-rc2/drivers/gpu/drm/amd/display/dc/dcn32/
A Ddcn32_resource.h604 SR_ARR(DWB_OGAM_RAMA_START_BASE_CNTL_R, id), \

Completed in 9 milliseconds