Searched refs:DispClocks (Results 1 – 13 of 13) sorted by relevance
51 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
593 max_dispclk = find_max_clk_value(clock_table->DispClocks, clock_table->NumDispClkLevelsEnabled); in dcn314_clk_mgr_helper_populate_bw_params()655 …bw_params->clk_table.entries[i].dispclk_mhz = find_max_clk_value(clock_table->DispClocks, NUM_DISP… in dcn314_clk_mgr_helper_populate_bw_params()820 i, smu_dpm_clks.dpm_clks->DispClocks[i]); in dcn314_clk_mgr_construct()
113 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
123 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
129 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
124 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
71 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
512 bw_params->clk_table.entries[i].dispclk_mhz = clock_table->DispClocks[i]; in dcn315_clk_mgr_helper_populate_bw_params()693 i, smu_dpm_clks.dpm_clks->DispClocks[i]); in dcn315_clk_mgr_construct()
100 uint32_t DispClocks[VG_NUM_DISPCLK_DPM_LEVELS]; member
79 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
522 max_dispclk = find_max_clk_value(clock_table->DispClocks, clock_table->NumDispClkLevelsEnabled); in dcn316_clk_mgr_helper_populate_bw_params()
132 uint32_t DispClocks[NUM_DISPCLK_DPM_LEVELS]; member
586 max_dispclk = find_max_clk_value(clock_table->DispClocks, clock_table->NumDispClkLevelsEnabled); in dcn31_clk_mgr_helper_populate_bw_params()774 i, smu_dpm_clks.dpm_clks->DispClocks[i]); in dcn31_clk_mgr_construct()
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