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Searched refs:GCC_BLSP1_QUP2_BCR (Results 1 – 22 of 22) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/reset/
A Dqcom,gcc-msm8974.h28 #define GCC_BLSP1_QUP2_BCR 19 macro
A Dqcom,gcc-apq8084.h28 #define GCC_BLSP1_QUP2_BCR 19 macro
A Dqcom,gcc-msm8916.h12 #define GCC_BLSP1_QUP2_BCR 3 macro
A Dqcom,gcc-msm8939.h12 #define GCC_BLSP1_QUP2_BCR 3 macro
A Dqcom,gcc-ipq6018.h12 #define GCC_BLSP1_QUP2_BCR 3 macro
/linux-6.3-rc2/include/dt-bindings/clock/
A Dqcom,gcc-sdx65.h94 #define GCC_BLSP1_QUP2_BCR 1 macro
A Dqcom,gcc-ipq4019.h129 #define GCC_BLSP1_QUP2_BCR 33 macro
A Dqcom,gcc-msm8909.h169 #define GCC_BLSP1_QUP2_BCR 3 macro
A Dqcom,gcc-msm8998.h199 #define GCC_BLSP1_QUP2_BCR 1 macro
A Dqcom,gcc-msm8996.h259 #define GCC_BLSP1_QUP2_BCR 19 macro
A Dqcom,gcc-ipq8074.h241 #define GCC_BLSP1_QUP2_BCR 3 macro
/linux-6.3-rc2/drivers/clk/qcom/
A Dgcc-ipq4019.c1672 [GCC_BLSP1_QUP2_BCR] = {0x03008, 0},
A Dgcc-sdx65.c1517 [GCC_BLSP1_QUP2_BCR] = { 0x1e000 },
A Dgcc-msm8909.c2638 [GCC_BLSP1_QUP2_BCR] = { 0x03008 },
A Dgcc-msm8974.c2759 [GCC_BLSP1_QUP2_BCR] = { 0x06c0 },
A Dgcc-msm8998.c3092 [GCC_BLSP1_QUP2_BCR] = { 0x1b000 },
A Dgcc-apq8084.c3526 [GCC_BLSP1_QUP2_BCR] = { 0x06c0 },
A Dgcc-msm8916.c3317 [GCC_BLSP1_QUP2_BCR] = { 0x03008 },
A Dgcc-msm8996.c3723 [GCC_BLSP1_QUP2_BCR] = { 0x1b000 },
A Dgcc-msm8939.c3874 [GCC_BLSP1_QUP2_BCR] = { 0x03008 },
A Dgcc-ipq6018.c4416 [GCC_BLSP1_QUP2_BCR] = { 0x03008, 0 },
A Dgcc-ipq8074.c4545 [GCC_BLSP1_QUP2_BCR] = { 0x03008, 0 },

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