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Searched refs:GCC_BLSP1_UART2_BCR (Results 1 – 22 of 22) sorted by relevance

/linux-6.3-rc2/include/dt-bindings/reset/
A Dqcom,gcc-msm8974.h29 #define GCC_BLSP1_UART2_BCR 20 macro
A Dqcom,gcc-apq8084.h29 #define GCC_BLSP1_UART2_BCR 20 macro
A Dqcom,gcc-msm8916.h13 #define GCC_BLSP1_UART2_BCR 4 macro
A Dqcom,gcc-msm8939.h13 #define GCC_BLSP1_UART2_BCR 4 macro
A Dqcom,gcc-ipq6018.h13 #define GCC_BLSP1_UART2_BCR 4 macro
/linux-6.3-rc2/include/dt-bindings/clock/
A Dqcom,gcc-sdx65.h98 #define GCC_BLSP1_UART2_BCR 5 macro
A Dqcom,gcc-ipq4019.h130 #define GCC_BLSP1_UART2_BCR 34 macro
A Dqcom,gcc-msm8909.h175 #define GCC_BLSP1_UART2_BCR 9 macro
A Dqcom,gcc-msm8998.h227 #define GCC_BLSP1_UART2_BCR 29 macro
A Dqcom,gcc-msm8996.h260 #define GCC_BLSP1_UART2_BCR 20 macro
A Dqcom,gcc-ipq8074.h242 #define GCC_BLSP1_UART2_BCR 4 macro
/linux-6.3-rc2/drivers/clk/qcom/
A Dgcc-ipq4019.c1673 [GCC_BLSP1_UART2_BCR] = {0x03028, 0},
A Dgcc-sdx65.c1521 [GCC_BLSP1_UART2_BCR] = { 0x1f000 },
A Dgcc-msm8909.c2644 [GCC_BLSP1_UART2_BCR] = { 0x03028 },
A Dgcc-msm8974.c2760 [GCC_BLSP1_UART2_BCR] = { 0x0700 },
A Dgcc-msm8998.c3122 [GCC_BLSP1_UART2_BCR] = { 0x1c000 },
A Dgcc-apq8084.c3527 [GCC_BLSP1_UART2_BCR] = { 0x0700 },
A Dgcc-msm8916.c3318 [GCC_BLSP1_UART2_BCR] = { 0x03028 },
A Dgcc-msm8996.c3724 [GCC_BLSP1_UART2_BCR] = { 0x1c000 },
A Dgcc-msm8939.c3875 [GCC_BLSP1_UART2_BCR] = { 0x03028 },
A Dgcc-ipq6018.c4417 [GCC_BLSP1_UART2_BCR] = { 0x03028, 0 },
A Dgcc-ipq8074.c4546 [GCC_BLSP1_UART2_BCR] = { 0x03028, 0 },

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