Searched refs:GCC_GPLL0 (Results 1 – 20 of 20) sorted by relevance
| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | qcom,qdu1000-gcc.h | 10 #define GCC_GPLL0 0 macro
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| A D | qcom,gcc-sc7280.h | 10 #define GCC_GPLL0 0 macro
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| A D | qcom,sm8550-gcc.h | 35 #define GCC_GPLL0 24 macro
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| A D | qcom,gcc-sm8450.h | 50 #define GCC_GPLL0 38 macro
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| A D | qcom,gcc-sm8350.h | 47 #define GCC_GPLL0 35 macro
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| A D | qcom,sa8775p-gcc.h | 11 #define GCC_GPLL0 0 macro
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| A D | qcom,gcc-sc8280xp.h | 11 #define GCC_GPLL0 0 macro
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| /linux-6.3-rc2/arch/arm64/boot/dts/qcom/ |
| A D | qdu1000.dtsi | 1312 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
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| A D | sc8280xp.dtsi | 4027 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
4039 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
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| A D | sc7280.dtsi | 5327 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
5337 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
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| A D | sm8350.dtsi | 3239 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
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| A D | sm8550.dtsi | 3335 clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>;
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| A D | sm8450.dtsi | 3965 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
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| /linux-6.3-rc2/drivers/clk/qcom/ |
| A D | gcc-qdu1000.c | 2429 [GCC_GPLL0] = &gcc_gpll0.clkr,
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| A D | gcc-sm8550.c | 3090 [GCC_GPLL0] = &gcc_gpll0.clkr,
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| A D | gcc-sm8450.c | 2986 [GCC_GPLL0] = &gcc_gpll0.clkr,
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| A D | gcc-sc7280.c | 3206 [GCC_GPLL0] = &gcc_gpll0.clkr,
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| A D | gcc-sm8350.c | 3549 [GCC_GPLL0] = &gcc_gpll0.clkr,
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| A D | gcc-sa8775p.c | 4426 [GCC_GPLL0] = &gcc_gpll0.clkr,
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| A D | gcc-sc8280xp.c | 6939 [GCC_GPLL0] = &gcc_gpll0.clkr,
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