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Searched refs:GCC_GPU_GPLL0_DIV_CLK_SRC (Results 1 – 25 of 37) sorted by relevance

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/linux-6.3-rc2/include/dt-bindings/clock/
A Dqcom,gcc-sc7180.h47 #define GCC_GPU_GPLL0_DIV_CLK_SRC 37 macro
A Dqcom,gcc-qcm2290.h95 #define GCC_GPU_GPLL0_DIV_CLK_SRC 85 macro
A Dqcom,gcc-sm6115.h82 #define GCC_GPU_GPLL0_DIV_CLK_SRC 74 macro
A Dqcom,gcc-sc7280.h45 #define GCC_GPU_GPLL0_DIV_CLK_SRC 35 macro
A Dqcom,gcc-sm6125.h124 #define GCC_GPU_GPLL0_DIV_CLK_SRC 115 macro
A Dqcom,sm8550-gcc.h42 #define GCC_GPU_GPLL0_DIV_CLK_SRC 31 macro
A Dqcom,gcc-sm8450.h56 #define GCC_GPU_GPLL0_DIV_CLK_SRC 44 macro
A Dqcom,sm6375-gcc.h109 #define GCC_GPU_GPLL0_DIV_CLK_SRC 98 macro
A Dqcom,gcc-sdm845.h42 #define GCC_GPU_GPLL0_DIV_CLK_SRC 32 macro
A Dqcom,gcc-sm8150.h48 #define GCC_GPU_GPLL0_DIV_CLK_SRC 38 macro
A Dqcom,gcc-sm8250.h45 #define GCC_GPU_GPLL0_DIV_CLK_SRC 35 macro
A Dqcom,gcc-sm8350.h52 #define GCC_GPU_GPLL0_DIV_CLK_SRC 40 macro
A Dqcom,sa8775p-gcc.h72 #define GCC_GPU_GPLL0_DIV_CLK_SRC 61 macro
A Dqcom,gcc-sc8180x.h47 #define GCC_GPU_GPLL0_DIV_CLK_SRC 37 macro
A Dqcom,gcc-sc8280xp.h86 #define GCC_GPU_GPLL0_DIV_CLK_SRC 75 macro
/linux-6.3-rc2/Documentation/devicetree/bindings/clock/
A Dqcom,gpucc.yaml83 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
/linux-6.3-rc2/drivers/clk/qcom/
A Dgcc-sdm845.c3558 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
3711 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
A Dgcc-sc7180.c2270 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
A Dgcc-sm8550.c3096 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
A Dgcc-qcm2290.c2832 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
A Dgcc-sm8450.c2991 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
A Dgcc-sc7280.c3214 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
A Dgcc-sm6115.c3331 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
A Dgcc-sm8250.c3343 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,
A Dgcc-sm6375.c3686 [GCC_GPU_GPLL0_DIV_CLK_SRC] = &gcc_gpu_gpll0_div_clk_src.clkr,

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