Searched refs:GCC_PCIE_0_SLV_AXI_CLK (Results 1 – 25 of 42) sorted by relevance
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| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | qcom,gcc-msm8994.h | 133 #define GCC_PCIE_0_SLV_AXI_CLK 123 macro
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| A D | qcom,gcc-sm6350.h | 71 #define GCC_PCIE_0_SLV_AXI_CLK 60 macro
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| A D | qcom,qdu1000-gcc.h | 54 #define GCC_PCIE_0_SLV_AXI_CLK 44 macro
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| A D | qcom,gcc-qcs404.h | 81 #define GCC_PCIE_0_SLV_AXI_CLK 72 macro
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| A D | qcom,gcc-sc7280.h | 58 #define GCC_PCIE_0_SLV_AXI_CLK 48 macro
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| A D | qcom,sm8550-gcc.h | 53 #define GCC_PCIE_0_SLV_AXI_CLK 42 macro
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| A D | qcom,gcc-sm8450.h | 68 #define GCC_PCIE_0_SLV_AXI_CLK 56 macro
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| A D | qcom,gcc-sdm845.h | 57 #define GCC_PCIE_0_SLV_AXI_CLK 47 macro
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| A D | qcom,gcc-sm8150.h | 66 #define GCC_PCIE_0_SLV_AXI_CLK 56 macro
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| A D | qcom,gcc-sm8250.h | 64 #define GCC_PCIE_0_SLV_AXI_CLK 54 macro
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| A D | qcom,gcc-sm8350.h | 66 #define GCC_PCIE_0_SLV_AXI_CLK 54 macro
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| A D | qcom,gcc-msm8998.h | 104 #define GCC_PCIE_0_SLV_AXI_CLK 95 macro
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| A D | qcom,sa8775p-gcc.h | 89 #define GCC_PCIE_0_SLV_AXI_CLK 78 macro
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| A D | qcom,gcc-sc8180x.h | 65 #define GCC_PCIE_0_SLV_AXI_CLK 55 macro
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| A D | qcom,gcc-apq8084.h | 336 #define GCC_PCIE_0_SLV_AXI_CLK 327 macro
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| A D | qcom,gcc-msm8996.h | 185 #define GCC_PCIE_0_SLV_AXI_CLK 176 macro
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| A D | qcom,gcc-sc8280xp.h | 105 #define GCC_PCIE_0_SLV_AXI_CLK 94 macro
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| /linux-6.3-rc2/arch/arm64/boot/dts/qcom/ |
| A D | qcs404.dtsi | 1486 <&gcc GCC_PCIE_0_SLV_AXI_CLK>;
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| /linux-6.3-rc2/drivers/clk/qcom/ |
| A D | gcc-qdu1000.c | 2450 [GCC_PCIE_0_SLV_AXI_CLK] = &gcc_pcie_0_slv_axi_clk.clkr,
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| A D | gcc-msm8994.c | 2562 [GCC_PCIE_0_SLV_AXI_CLK] = &gcc_pcie_0_slv_axi_clk.clkr,
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| A D | gcc-qcs404.c | 2685 [GCC_PCIE_0_SLV_AXI_CLK] = &gcc_pcie_0_slv_axi_clk.clkr,
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| A D | gcc-sm8550.c | 3107 [GCC_PCIE_0_SLV_AXI_CLK] = &gcc_pcie_0_slv_axi_clk.clkr,
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| A D | gcc-msm8998.c | 2999 [GCC_PCIE_0_SLV_AXI_CLK] = &gcc_pcie_0_slv_axi_clk.clkr,
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| A D | gcc-sm8450.c | 3003 [GCC_PCIE_0_SLV_AXI_CLK] = &gcc_pcie_0_slv_axi_clk.clkr,
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| A D | gcc-apq8084.c | 3439 [GCC_PCIE_0_SLV_AXI_CLK] = &gcc_pcie_0_slv_axi_clk.clkr,
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