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Searched refs:GCC_PCIE_1_BCR (Results 1 – 25 of 29) sorted by relevance

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/linux-6.3-rc2/include/dt-bindings/reset/
A Dqcom,gcc-apq8084.h92 #define GCC_PCIE_1_BCR 83 macro
/linux-6.3-rc2/include/dt-bindings/clock/
A Dqcom,gcc-sc7280.h211 #define GCC_PCIE_1_BCR 2 macro
A Dqcom,sm8550-gcc.h192 #define GCC_PCIE_1_BCR 8 macro
A Dqcom,gcc-sm8450.h208 #define GCC_PCIE_1_BCR 9 macro
A Dqcom,gcc-sdm845.h207 #define GCC_PCIE_1_BCR 2 macro
A Dqcom,gcc-sm8150.h219 #define GCC_PCIE_1_BCR 6 macro
A Dqcom,gcc-sm8250.h221 #define GCC_PCIE_1_BCR 9 macro
A Dqcom,gcc-sm8350.h223 #define GCC_PCIE_1_BCR 9 macro
A Dqcom,sa8775p-gcc.h274 #define GCC_PCIE_1_BCR 12 macro
A Dqcom,gcc-sc8180x.h256 #define GCC_PCIE_1_BCR 6 macro
A Dqcom,gcc-msm8996.h321 #define GCC_PCIE_1_BCR 81 macro
/linux-6.3-rc2/drivers/clk/qcom/
A Dgcc-sm8550.c3245 [GCC_PCIE_1_BCR] = { 0x8d000 },
A Dgcc-sm8450.c3140 [GCC_PCIE_1_BCR] = { 0x9d000 },
A Dgcc-apq8084.c3590 [GCC_PCIE_1_BCR] = { 0x1b40 },
A Dgcc-sc7280.c3388 [GCC_PCIE_1_BCR] = { 0x8d000 },
A Dgcc-sm8250.c3544 [GCC_PCIE_1_BCR] = { 0x8d000 },
A Dgcc-msm8996.c3785 [GCC_PCIE_1_BCR] = { 0x6d000 },
A Dgcc-sm8150.c3719 [GCC_PCIE_1_BCR] = { 0x8d000 },
A Dgcc-sm8350.c3741 [GCC_PCIE_1_BCR] = { 0x8d000 },
A Dgcc-sdm845.c3876 [GCC_PCIE_1_BCR] = { 0x8d000 },
A Dgcc-sa8775p.c4634 [GCC_PCIE_1_BCR] = { 0x77000 },
A Dgcc-sc8180x.c4496 [GCC_PCIE_1_BCR] = { 0x8d000 },
/linux-6.3-rc2/arch/arm64/boot/dts/qcom/
A Dsm8350.dtsi1617 resets = <&gcc GCC_PCIE_1_BCR>;
A Dsm8550.dtsi1803 resets = <&gcc GCC_PCIE_1_BCR>,
A Dsm8150.dtsi1932 resets = <&gcc GCC_PCIE_1_BCR>;

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