Searched refs:GCC_PCIE_PHY_BCR (Results 1 – 24 of 24) sorted by relevance
| /linux-6.3-rc2/include/dt-bindings/clock/ |
| A D | qcom,gcc-sdx55.h | 100 #define GCC_PCIE_PHY_BCR 4 macro
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| A D | qcom,gcc-sdx65.h | 104 #define GCC_PCIE_PHY_BCR 11 macro
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| A D | qcom,sm8550-gcc.h | 197 #define GCC_PCIE_PHY_BCR 13 macro
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| A D | qcom,gcc-sm8450.h | 213 #define GCC_PCIE_PHY_BCR 14 macro
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| A D | qcom,gcc-sdm845.h | 208 #define GCC_PCIE_PHY_BCR 3 macro
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| A D | qcom,gcc-sm8150.h | 221 #define GCC_PCIE_PHY_BCR 8 macro
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| A D | qcom,gcc-sm8250.h | 231 #define GCC_PCIE_PHY_BCR 19 macro
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| A D | qcom,gcc-msm8998.h | 276 #define GCC_PCIE_PHY_BCR 78 macro
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| A D | qcom,gcc-sc8180x.h | 262 #define GCC_PCIE_PHY_BCR 12 macro
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| A D | qcom,gcc-msm8996.h | 325 #define GCC_PCIE_PHY_BCR 85 macro
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| /linux-6.3-rc2/Documentation/devicetree/bindings/phy/ |
| A D | qcom,msm8996-qmp-pcie-phy.yaml | 140 resets = <&gcc GCC_PCIE_PHY_BCR>,
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| /linux-6.3-rc2/arch/arm/boot/dts/ |
| A D | qcom-sdx55.dtsi | 319 resets = <&gcc GCC_PCIE_PHY_BCR>;
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| /linux-6.3-rc2/drivers/clk/qcom/ |
| A D | gcc-sdx55.c | 1567 [GCC_PCIE_PHY_BCR] = { 0x39000 },
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| A D | gcc-sdx65.c | 1527 [GCC_PCIE_PHY_BCR] = { 0x44000 },
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| A D | gcc-sm8550.c | 3250 [GCC_PCIE_PHY_BCR] = { 0x6f000 },
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| A D | gcc-msm8998.c | 3171 [GCC_PCIE_PHY_BCR] = { 0x6f000 },
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| A D | gcc-sm8450.c | 3145 [GCC_PCIE_PHY_BCR] = { 0x7f000 },
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| A D | gcc-sm8250.c | 3554 [GCC_PCIE_PHY_BCR] = { 0x6f000 },
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| A D | gcc-msm8996.c | 3789 [GCC_PCIE_PHY_BCR] = { 0x6f000 },
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| A D | gcc-sm8150.c | 3721 [GCC_PCIE_PHY_BCR] = { 0x6f000 },
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| A D | gcc-sdm845.c | 3877 [GCC_PCIE_PHY_BCR] = { 0x6f000 },
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| A D | gcc-sc8180x.c | 4502 [GCC_PCIE_PHY_BCR] = { 0x6f000 },
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| /linux-6.3-rc2/arch/arm64/boot/dts/qcom/ |
| A D | msm8998.dtsi | 962 resets = <&gcc GCC_PCIE_0_PHY_BCR>, <&gcc GCC_PCIE_PHY_BCR>;
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| A D | msm8996.dtsi | 625 resets = <&gcc GCC_PCIE_PHY_BCR>,
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