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Searched refs:GCC_QUPV3_WRAP0_S2_CLK (Results 1 – 25 of 46) sorted by relevance

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/linux-6.3-rc2/include/dt-bindings/clock/
A Dqcom,gcc-sc7180.h72 #define GCC_QUPV3_WRAP0_S2_CLK 62 macro
A Dqcom,gcc-sm6350.h86 #define GCC_QUPV3_WRAP0_S2_CLK 75 macro
A Dqcom,qdu1000-gcc.h70 #define GCC_QUPV3_WRAP0_S2_CLK 60 macro
A Dqcom,gcc-qcm2290.h118 #define GCC_QUPV3_WRAP0_S2_CLK 108 macro
A Dqcom,gcc-sm6115.h104 #define GCC_QUPV3_WRAP0_S2_CLK 96 macro
A Dqcom,gcc-sc7280.h84 #define GCC_QUPV3_WRAP0_S2_CLK 74 macro
A Dqcom,gcc-sm6125.h146 #define GCC_QUPV3_WRAP0_S2_CLK 137 macro
A Dqcom,gcc-sm8450.h102 #define GCC_QUPV3_WRAP0_S2_CLK 90 macro
A Dqcom,sm6375-gcc.h129 #define GCC_QUPV3_WRAP0_S2_CLK 118 macro
A Dqcom,gcc-sdm845.h82 #define GCC_QUPV3_WRAP0_S2_CLK 72 macro
A Dqcom,gcc-sm8150.h95 #define GCC_QUPV3_WRAP0_S2_CLK 85 macro
A Dqcom,gcc-sm8250.h101 #define GCC_QUPV3_WRAP0_S2_CLK 91 macro
A Dqcom,gcc-sm8350.h93 #define GCC_QUPV3_WRAP0_S2_CLK 81 macro
A Dqcom,sa8775p-gcc.h126 #define GCC_QUPV3_WRAP0_S2_CLK 115 macro
A Dqcom,gcc-sc8180x.h110 #define GCC_QUPV3_WRAP0_S2_CLK 100 macro
A Dqcom,gcc-sc8280xp.h196 #define GCC_QUPV3_WRAP0_S2_CLK 185 macro
/linux-6.3-rc2/arch/arm64/boot/dts/qcom/
A Dsm6125.dtsi824 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
841 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
A Dqdu1000.dtsi449 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
465 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
A Dsm6375.dtsi865 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
881 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
A Dsm6115.dtsi951 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
967 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
A Dsdm670.dtsi520 clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
/linux-6.3-rc2/drivers/clk/qcom/
A Dgcc-sdm845.c3582 [GCC_QUPV3_WRAP0_S2_CLK] = &gcc_qupv3_wrap0_s2_clk.clkr,
3754 [GCC_QUPV3_WRAP0_S2_CLK] = &gcc_qupv3_wrap0_s2_clk.clkr,
A Dgcc-sc7180.c2295 [GCC_QUPV3_WRAP0_S2_CLK] = &gcc_qupv3_wrap0_s2_clk.clkr,
A Dgcc-sm6350.c2404 [GCC_QUPV3_WRAP0_S2_CLK] = &gcc_qupv3_wrap0_s2_clk.clkr,
A Dgcc-qdu1000.c2466 [GCC_QUPV3_WRAP0_S2_CLK] = &gcc_qupv3_wrap0_s2_clk.clkr,

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