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Searched refs:GCC_QUPV3_WRAP0_S5_CLK (Results 1 – 25 of 44) sorted by relevance

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/linux-6.3-rc2/include/dt-bindings/clock/
A Dqcom,gcc-sc7180.h78 #define GCC_QUPV3_WRAP0_S5_CLK 68 macro
A Dqcom,gcc-sm6350.h92 #define GCC_QUPV3_WRAP0_S5_CLK 81 macro
A Dqcom,qdu1000-gcc.h76 #define GCC_QUPV3_WRAP0_S5_CLK 66 macro
A Dqcom,gcc-qcm2290.h124 #define GCC_QUPV3_WRAP0_S5_CLK 114 macro
A Dqcom,gcc-sm6115.h110 #define GCC_QUPV3_WRAP0_S5_CLK 102 macro
A Dqcom,gcc-sc7280.h90 #define GCC_QUPV3_WRAP0_S5_CLK 80 macro
A Dqcom,gcc-sm6125.h152 #define GCC_QUPV3_WRAP0_S5_CLK 143 macro
A Dqcom,gcc-sm8450.h108 #define GCC_QUPV3_WRAP0_S5_CLK 96 macro
A Dqcom,sm6375-gcc.h135 #define GCC_QUPV3_WRAP0_S5_CLK 124 macro
A Dqcom,gcc-sdm845.h88 #define GCC_QUPV3_WRAP0_S5_CLK 78 macro
A Dqcom,gcc-sm8150.h101 #define GCC_QUPV3_WRAP0_S5_CLK 91 macro
A Dqcom,gcc-sm8250.h107 #define GCC_QUPV3_WRAP0_S5_CLK 97 macro
A Dqcom,gcc-sm8350.h99 #define GCC_QUPV3_WRAP0_S5_CLK 87 macro
A Dqcom,sa8775p-gcc.h132 #define GCC_QUPV3_WRAP0_S5_CLK 121 macro
A Dqcom,gcc-sc8180x.h116 #define GCC_QUPV3_WRAP0_S5_CLK 106 macro
A Dqcom,gcc-sc8280xp.h203 #define GCC_QUPV3_WRAP0_S5_CLK 192 macro
/linux-6.3-rc2/Documentation/devicetree/bindings/soc/qcom/
A Dqcom,geni-se.yaml142 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
/linux-6.3-rc2/arch/arm64/boot/dts/qcom/
A Dqdu1000.dtsi527 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
543 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
A Dsm6115.dtsi1056 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
1072 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
A Dsdm670.dtsi571 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
A Dsc7180.dtsi1039 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
1059 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
1077 clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
/linux-6.3-rc2/drivers/clk/qcom/
A Dgcc-sdm845.c3588 [GCC_QUPV3_WRAP0_S5_CLK] = &gcc_qupv3_wrap0_s5_clk.clkr,
3760 [GCC_QUPV3_WRAP0_S5_CLK] = &gcc_qupv3_wrap0_s5_clk.clkr,
A Dgcc-sc7180.c2301 [GCC_QUPV3_WRAP0_S5_CLK] = &gcc_qupv3_wrap0_s5_clk.clkr,
A Dgcc-sm6350.c2410 [GCC_QUPV3_WRAP0_S5_CLK] = &gcc_qupv3_wrap0_s5_clk.clkr,
A Dgcc-qdu1000.c2472 [GCC_QUPV3_WRAP0_S5_CLK] = &gcc_qupv3_wrap0_s5_clk.clkr,

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