Searched refs:GEN10_CACHE_MODE_SS (Results 1 – 2 of 2) sorted by relevance
| /linux-6.3-rc2/drivers/gpu/drm/i915/gt/ |
| A D | intel_workarounds.c | 639 wa_mcr_add(wal, GEN10_CACHE_MODE_SS, 0, in icl_ctx_workarounds_init()
2396 wa_mcr_masked_en(wal, GEN10_CACHE_MODE_SS, in rcs_engine_wa_init()
2479 wa_mcr_add(wal, GEN10_CACHE_MODE_SS, 0, in rcs_engine_wa_init()
2958 wa_mcr_masked_en(wal, GEN10_CACHE_MODE_SS, DISABLE_ECC); in ccs_engine_wa_init()
3123 wa_mcr_add(wal, GEN10_CACHE_MODE_SS, 0, in general_render_compute_wa_init()
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| A D | intel_gt_regs.h | 1155 #define GEN10_CACHE_MODE_SS MCR_REG(0xe420) macro
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