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Searched refs:GEN8_3LVL_PDPES (Results 1 – 7 of 7) sorted by relevance

/linux-6.3-rc2/drivers/gpu/drm/i915/gvt/
A Dgtt.h143 #define GVT_RING_CTX_NR_PDPS GEN8_3LVL_PDPES
A Dgvt.h157 u64 i915_context_pdps[GEN8_3LVL_PDPES];
A Dscheduler.c1302 for (i = 0; i < GEN8_3LVL_PDPES; i++) { in i915_context_ppgtt_root_restore()
1363 for (i = 0; i < GEN8_3LVL_PDPES; i++) { in i915_context_ppgtt_root_save()
A Dcmd_parser.c863 u64 pdps[GEN8_3LVL_PDPES]; in cmd_pdp_mmio_update_handler()
/linux-6.3-rc2/drivers/gpu/drm/i915/gt/
A Dgen8_ppgtt.c84 for (i = 0; i < GEN8_3LVL_PDPES; i++) { in gen8_ppgtt_notify_vgt()
863 GEM_BUG_ON(gen8_pd_top_count(vm) != GEN8_3LVL_PDPES); in gen8_preallocate_top_level_pdp()
865 for (idx = 0; idx < GEN8_3LVL_PDPES; idx++) { in gen8_preallocate_top_level_pdp()
A Dintel_gtt.h125 #define GEN8_3LVL_PDPES 4 macro
A Dintel_execlists_submission.c2739 cs = intel_ring_begin(rq, 4 * GEN8_3LVL_PDPES + 2); in emit_pdps()
2744 *cs++ = MI_LOAD_REGISTER_IMM(2 * GEN8_3LVL_PDPES) | MI_LRI_FORCE_POSTED; in emit_pdps()
2745 for (i = GEN8_3LVL_PDPES; i--; ) { in emit_pdps()

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